In recent years, efforts have been made to use pin grid arrays (PGA) in a wider range of applications by replacing mounted IC chips for conversion into other functions. To adapt PGAs for such use, ceramic has been employed as the material of PGA circuit boards.
Ceramic boards have high product reliability as they are of high insulation and heat radiation capabilities. However, ceramic boards are disadvantageous in that they shrink when interconnection patterns are printed and baked, and that it is difficult to increase the number of interconnection patterns or make fine patterns on the ceramic boards. For this reason, if more interconnection patterns are formed in PGAs with ceramic boards, it results in larger PGAs and more expensive semiconductor devices.
In view of the above shortcomings of ceramic boards, there have been proposed various semiconductor devices which employ resin circuit boards rather than ceramic circuit boards. Semiconductor devices with resin circuit boards offer advantages in that fine patterns can be made on the resin circuit boards and the resultant semiconductor devices are inexpensive. However, the semiconductor devices with resin circuit boards have not been in widespread use because of a heat radiation problem.
More specifically, an LSI circuit with a largesize IC mounted thereon generates a large amount of heat inducted by an operating current. Unless the generated heat is radiated out quickly, the temperature of the IC increases, with the results that the operating speed of the IC is lowered and the IC suffers a thermal breakdown.
Semiconductor devices with resin boards, whose structure is improved for better heat radiation, are disclosed in Japanese laid-open patent publications Nos. 1-204453 and 2-102738. The disclosed structure will be described below with reference to FIGS. 13 and 14 of the accompanying drawings.
FIG. 13 shows in cross section a conventional resin-board pin grid array (PPGA). As shown in FIG. 13, an IC chip 3 is placed on a die bond pattern 2a of a resin board 1. As known in the art, the IC chip 3 is connected to a pattern 2d by wires 108 on the resin board 1. The IC chip 3 is sealed in an injection-molded resin block 4 with a heat radiation plate 107 fixed to the upper surface of the injection-molded resin block 4 by integral molding. A lower pattern 2b is disposed on a lower surface of the resin board 1 at a position corresponding to the die bond pattern 2a.
The die bond pattern 2a has a portion 2c extending into a region where contact pins 120 are mounted. The portion 2c has a through hole 2e defined therein, and a contact pin 120a is soldered in the through hole 2e. The contact pin 120a extends through the through hole 2e, and is soldered to the lower pattern 2b. Therefore, heat from the IC chip 3 can be radiated out through the die bond pattern 2a, the contact pin 120a, and the lower pattern 2b.
FIG. 14 shows in cross section another conventional PPGA. A die bond pattern 2a has a plurality of through holes 110 arranged in its plane and held in direct contact with a lower pattern 2b on a resin board 1. Therefore, heat from an IC chip 3 is propagated through the through holes 110, and radiated out from the wide area of the lower pattern 2b.
The PPGA is a promising semiconductor device as it is less expensive than the PGA with the ceramic substrate and has a heat radiation capability.
However, since large chips are employed as the capacity of semiconductor memories increases, PPGAs used are expensive and cannot simply be scrapped after use. Usually, it is necessary to remove PPGAs from motherboards and then install them on other motherboards for reuse.
Even if a PPGA is removed with heat from a motherboard so that it will be installed on another motherboard, the reparability of the PPGA is not impaired because the contact pins 120, 120a remain unchanged in shape. There is no heat problem since heat from the IC chip 3 can be radiated through the through holes. However, inasmuch as PPGAs require 100 or more contact pins 120 as external connection terminals, they are manufactured in a large number of steps and are highly costly.
One design which is now under consideration for solving the cost problem of the PPGAs and reducing the cost thereof is a surface-mounted semiconductor (memory) device.
Conventional surface-mounted memory devices will be described below with reference to FIGS. 15 and 16 of the accompanying drawings.
FIG. 15 shows in cross section a pin-type memory device 100. Circuit patterns on upper and lower surfaces of a circuit board 1 are interconnected by through holes (not shown). An IC chip 3 is mounted on the upper pattern 2 and molded in a sealing resin block 4. Short pins 6 are mounted as external connection terminals on the lower pattern 5, the short pins 6 being inserted in the non-illustrated through holes. To mount the memory device 100 on a motherboard, a solder-plated layer or a conductive adhesive is applied to a pattern on the motherboard, and then the pins 6 of the memory device 100 are positioned and placed on the pattern. Thereafter, the assembly is heated to melt the solder-plated layer or the conductive adhesive, thereby surface-mounting the memory device 100 on the motherboard.
FIG. 16 shows in cross section a memory device of the solder-bump type. Parts shown in FIG. 16 which are identical to those of the memory device 100 shown in FIG. 15 are denoted by identical reference numerals, and will not be described in detail. The memory device, designated by 200 in FIG. 16, is different from the memory device 100 shown in FIG. 15 in that external connection terminals comprise solder bumps 7. To mount the memory device 200 on a motherboard, the solder bumps 7 of the memory device 200 are positioned and placed directly on a pattern on the motherboard. Then, the assembly is heated to melt the solder bumps 7, thereby surface-mounting the memory device 100 on the motherboard.
When the pin-type memory device 100 shown in FIG. 15 is removed with heat from the motherboard so that it will be installed on another motherboard, the reparability of the memory device 100 is not impaired because the pins 6 remain Unchanged in shape. However, inasmuch as the memory device 100 requires 100 or more pins 6 as external connection terminals as in the PPGA, a large number of steps are required to manufacture the memory device 100, and hence the memory device 100 has no merit with respect to the cost.
The solder-bump-type memory device 200 shown in FIG. 16 is advantageous as to the cost because it employs solder bumps that do not require a large number of manufacturing steps. However, when the solder bumps 7 are melted to remove the memory device 200 from the motherboard for the purpose of mounting the memory device 200 on another motherboard, the solder bumps 7 are no longer in good shape, making it difficult to mount the memory device 200 on the other motherboard. That is, the reparability of the memory device 20 is poor.
It is therefore an object of the present invention to provide a surface-mounted semiconductor device having good heat radiation capability and reparability and a method of manufacturing such a semiconductor device at a low cost, by eliminating the above problems which the conventional surface-mounted semiconductor devices have suffered.